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Syntek Semiconductor Co., Ltd.
Specification
1. FEATURES :
STK55C324
* Operating voltage : 2.5V - 5.5 V. * Maximum CPU operating frequency : 2MHz at 2.7V * Dual oscillators : - RC or 32.768 KHz crystal oscillator for LCD display and watch timer. - RC oscillator for system clock. * 40 segments and 8 commons output for LCD driver. - 1/4 bias, 1/8 duty and 64Hz frame frequency. - 16 levels contrast control. * I/O port. - 8 I/O pins with selectable wake up interrupt. - Two output pins. These two pins can be set as sound channel DAC outputs. * Built in 160 bytes data RAM and 40 bytes display RAM. * Built in 32K bytes ROM for program. * One 8-bit timer with 8 predefined input clock. * Two sound generators with 7-bit D/A output. * Four interrupt sources : NMI - 64 Hz interrupt IRQ1 - Fix-time timer interrupt IRQ2 - Timer interrupt IRQ3 - External interrupt * Code option : - Built-in 150K OHM pull-up resistors for I/O port. - RC or 32768Hz crystal oscillation for LCD driver.
2. APPLICATION :
* Calculator * Hand-held game * Small instrument * Toy
LCD Controller
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Issue date: 13 August, 1999
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3. BLOCK DIAGRAM :
STK55C324
OSC1
OSC2
32768Hz
RC oscillator
8-bit CPU
Clock Generator
ROM 32Kx8 LCD driver with 4-bit contrast control
CONTRAST C0-C7 S0-S39
RAM 160x8
LCD RAM 40x8 A0-A15 Address decoder D0-D7 IRQ 8-bit Timer
Port 1
Two sound generator with 7-bit D/A
P10-P17
SOUND1
SOUND2
LCD Controller
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4. PIN DESCRIPTION :
Pin name COM0-COM7 SEG0-SEG39 P10-P17 OSC1 OSC2 XOSC1 XOSC2 SOUND1 SOUND2 /RES CONTRAST VDD VSS I/O O O I/O I O I O O O I I (Total 66 pads) Function description LCD common output pins LCD segment output pins 8-bit I/O pins for port 1 Main system oscillator input pin for chip Main system oscillator output pin for resistor 32.768K Hz crystal oscillator input 32.768K Hz crystal oscillator output
STK55C324
Sound channel 1 output with volume control. This pin is CMOS output when sound channel is disabled. Sound channel 2 output with volume control. This pin is CMOS output when sound channel is disabled. System reset pin with 150K pull-up resistor. Bias voltage input pin. Add a resistor to Vdd can change the LCD contrast. Power input Signal ground
5. ADDRESS ARRANGEMENT
1) RAM 0000-003C for LCD output data storage. The memory address which are not specified in the table are not implemented Memory address Pin for 1/8 duty 0000-0004 COM0 0008-000C COM1 0010-0014 COM2 0018-001C COM3 0020-0024 COM4 0028-002C COM5 0030-0034 COM6 0038-003C COM7 The LSB of low byte - SEG0. The MSB of high byte - SEG39. LCD Controller
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The middle bits are in the order. 0040-00DF for zero page area. 0100-01DF for stacks. This area is overlapped with 0000-00DF. 2) ROM 8000-FFFF for program area. FFFF, FFFE - IRQ vector. FFFD, FFFC - RES vector. FFFB, FFFA - NMI vector. 3) Others 1000 To enter stand-by mode. Write only. * Write this address, the CPU will be hold with LCD state no change. * When in stand-by mode, the NMI and IRQ will wake up the CPU.
STK55C324
1001 To enter sleep mode. Write only. Bit 0 = 1 Sleep mode 1 1 = 1 Sleep mode 2 In sleep mode 1, both of the main system oscillator and 32.768KHz sub-system oscillator will be stopped. So, all functions are stopped and only external interrupt can wake up this chip. The LCD display will be turn off while getting into sleep mode 1. If the LCD is turned on after wake-up immediately, then some garbage may display on the LCD. It is better to turn off the LCD by software before enter sleep mode 1. After wake up, the software has to delay several ms before turn on the LCD because the crystal will take several mS to stable. In sleep mode 2, only main system oscillator will be stopped. So, the following functions will still keep working. * The LCD will be kept on. * The fix-time timer will keep going. * The NMI, port 1, and fix-time timer interrupt will wake up this chip. * CPU will keep working if clock source is 32.768K Hz. 1002 Watch timer control register. Write only. Bit 1 : = 0 Set fix-time timer interrupt at 2 Hz = 1 Set fix-time timer interrupt at 1 Hz LCD Controller
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4 : = 0 CPU clock is system clock. = 1 CPU clock is 32.768K Hz. 7-5 : Reserved. The default values for each bit is zero.
STK55C324
1003 IRQ flag register. Read & write. Read function : Bit 0 : = 1 Fix-time timer interrupt, IRQ1. 1 : = 1 Timer interrupt, IRQ2. 2 : = 1 External interrupt, IRQ3. Write function : Bit 0 : = 0 Clear fix-time timer interrupt. 1 : = 0 Clear timer interrupt. 2 : = 0 Clear external interrupt. * Before firmware exits the interrupt routine, the interrupt flag must be cleared. Otherwise, the IC will get into interrupt again. * Write 0 to clear the corresponding IRQ but do not use `STZ $1003' to clear all interrupts at the same time. Following instructions are recommended LDA $1003 STA IRQBuff EOR #0FFH STA $1003 ;Clear all active interrupts at the same time LDA IRQBuff AND #1 BEQ next_irq * Do NOT use TRB to test and clear this register. Following instructions are recommended. LDA $1003 AND #1 ;Check IRQ 1 BEQ next_irq STA $1003 ;Clear the active interrupt. 1004 Port 1 data. Read & write. 1005 Set port 1 bit function. Write only. * An '1' in this register will set the corresponding pin of port 1 as an output pin. * The default values for each bit is zero. A pull-up resistor can be added to the pin by code option. LCD Controller
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But the pull-up resistor will be disabled if this pin is set as output.
STK55C324
1008 Volume control for sound channel 1. Write only. Bit 7-1 : Volume for sound channel 1. $FF is the maximum volume. If bit 1 of $1013 is zero, then bit 1 will output to SOUND 1 pin. 1009 Volume control for sound channel 2. Write only. Bit 7-1 : Volume for sound channel 2. $FF is the maximum volume. If bit 3 of $1013 is zero, then bit 1 will output to SOUND 2 pin. 100C Set port 1 bit interrupt function. Write only. * An '1' in this register will set the interrupt function of the corresponding pin of port 1 to be enable. That is, an interrupt will be generated if a low level is detected in the pin. * If port 1 are used as key inputs, there are several interrupts will be generated during key pressing or release. This is caused by key bounce. It is suggested to disable the port1 interrupt after port 1 interrupt is detected and enable the port 1 interrupt after key released. Or enable port 1 interrupt before entering sleep or standby mode and disable port 1 interrupt after IC wakeup. * The default values for each bit is zero. 100D Timer 1 data. Read & write. * Before writing $100D, the program should select timer clock ($100E) first. * After timer 1 been enabled, the timer will start to count down. When timer counts to zero, the timer will count from the initial value and IRQ2 will happen. * Valid values are from 1 to 255. Zero is prohibited. * If CPU read this register, the value will be 1 to 255. Please note that the CPU will never read a zero from timer. * The time elapse = ($100D)/timer clock 100E Timer 1 clock select and contrast setting. Write only. Bit 2-0 : = 000 System clock/2 = 001 System clock/4 = 010 System clock/8 = 011 System clock/16 = 100 System clock/32 = 101 System clock/64 = 110 System clock/128 = 111 System clock/256 LCD Controller
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STK55C324
3 : Reserved 7-4 : LCD contrast control. The minimum contrast value is zero and the maximum contrast value is 0FH. The default state is maximum contrast. The default values of bit 3-0 are unknown. 100F Control register. Write only. Bit 1 : = 0 Disable timer 1 interrupt. = 1 Enable timer 1 interrupt. 2 : = 0 Disable NMI. = 1 Enable NMI. 3 : = 0 Disable timer 1. = 1 Enable timer 1. 4 : = 0 LCD off. = 1 LCD on. 6 : = 0 Disable fix-time timer interrupt. = 1 Enable fix-time timer interrupt. * The default values for each bit is zero. 1010 Sound generator clock select. Write only. Bit 2-0 : Sound generator 1 clock select. 6-4 : Sound generator 2 clock select. = 000 System clock/2 = 001 System clock/4 = 010 System clock/8 = 011 System clock/16 = 100 System clock/32 = 101 System clock/64 = 110 System clock/128 = 111 System clock/256 7&3 : Reserved The default value is unknown. 1011 Sound generator 1 data. Write only. * Before writing $1011, the program should select timer clock ($1010) first. * After sound generator is enabled, it will start to count down. When it counts to zero, the it will count from the initial value again. * Valid values are from 1 to 255. Zero is prohibited. LCD Controller
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* The time elapse = ($1011)/timer clock/2
STK55C324
1012 Sound generator 2 data. Write only. * Before writing $1012, the program should select timer clock ($1010) first. * After sound generator is enabled, it will start to count down. When it counts to zero, it will count from the initial value again. * Valid values are from 1 to 255. Zero is prohibited. * The time elapse = ($1012)/timer clock/2 1013 Sound channel control register. Write only. Bit 0 : = 0 Disable sound generator 1. = 1 Enable sound generator 1. 1 : = 0 Set SOUND 1 to CMOS output pin. = 1 Set SOUND 1 to sound channel 1 DAC output. 2 : = 0 Disable sound generator 2. = 1 Enable sound generator 2. 3 : = 0 Set SOUND 2 to CMOS output pin. = 1 Set SOUND 2 to sound channel 2 DAC output. The default values for each bit is zero. Please follow the item 6.4 for sound channel operation.
Bit 1 of $1008($1009) Sound generator output Bit 0(2) of $1013 0 0 $1008($1009) S 0 OUT 1 OUT D/A 1 S SOUND1(2)
Bit 1(3) of $1013
6. FUNCTION DESCRIPTION
6.1 The reset state of control registers: Address $1002 $1003 LCD Controller Value after reset XXX00000 XXXXX000
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$1004 $1005 $1008 $1009 $100C $100D $100E $100F $1010 $1011 $1012 $1013 XXH 00H XXXXXX0X XXXXXX0X 00H XXH FXH 00H XXH XXH XXH 00H
STK55C324
6.2 The reset status of CPU If the /RES is keep low more than two system clocks, then the CPU will be reset. After reset, the interrupt mask flag is set, the decimal mode is cleared and the program counter will be loaded with the reset vector from address $FFFC and $FFFD. So, after initial procedure the firmware should do a `CLI' instruction. Otherwise, the CPU will not acknowledge any interrupt. 6.3 Interrupt Sources * There are five interrupt sources : NMI - 64 Hz interrupt. IRQ1 - Fix-time timer interrupt. IRQ2 - Timer interrupt. IRQ3 - Port 1 interrupt. * All interrupts will wake up CPU from standby mode. * NMI, IRQ1 and IRQ3 will wake up CPU from sleep mode 2. * Only IRQ3 will wake up CPU from sleep mode 1. * When port 1 is in input mode and pin interrupt enable, a low signal from pin will generate IRQ3. * When the CPU acknowledge the interrupt, following things will be done: a) The interrupt mask flag will be set by CPU b) The return address and status register will be pushed to stack. * When the CPU return from interrupt routine by RTI instruction following things will be done: a) The return address and status register will be pulled from stack. b) The interrupt mask flag will be cleared. LCD Controller
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STK55C324
* It is not necessary to add SEI and CLI instructions in interrupt routine . If a CLI instruction is added in the interrupt routine, then another interrupt may be inserted during current interrupt routine and may cause stack overflow. 6.4 Sound channel operation : 6.4.1 If two sound channels are used and the SOUND1 and SOUND2 are tied together, then please follow below instructions to make two sound channels work. 1). All channels off. a. Set $1013 to zero. b. Set $1008 and $1009 to zero . 2). Channel 1 output tone and channel 2 output voice or turn off . a. Set $1013 to 0BH. b. Set $1009 to zero to turn off or set the volume according to the voice data. c. Set $1008 to the desired volume. d. Set sound generator to the desired frequency. 3). Channel 2 output tone and channel 1 output voice or turn off. a. Set $1013 to 0EH. b. Set $1008 to zero to turn off or set the volume according to the voice data. c. Set $1009 to the desired volume. d. Set sound generator to the desired frequency. 4). Channel 1 output voice or turns off and channel 2 output voice or turns off. a. Set $1013 to 0AH. b. Set $1009 to zero to turn off or set the volume according to the voice data.. c. Set $1008 to zero to turn off or set the volume according to the voice data. Note : If both of these two channels are off, then $1013 should be set to zero. (see item 1) 5). Two channels output tone. a. Set $1013 to 0FH. b. Set $1008 and $1009 to the desired volumes. c. Set sound generators to the desired frequency. 6.4.2 If only one channel is used or two channels are used but they are not tied together, then follow below instructions. 1). Channel off. a. Set SOUND output to CMOS output (bit 1 or bit 3 of $1013 to zero). b. Set volume to zero ($1008 or $1009). 2). Channel output tone. a. Set SOUND output to DAC output (bit 1 or bit 3 of $1013 to one). b. Set sound generator to the desired frequency. c. Set the channel volume ($1008 or $1009). d. Enable sound generator (bit 0 or bit 2 of $1013 to one). 3). Channel output voice. a. Set SOUND output to DAC output (bit 1 or bit 3 of $1013 to one). b. Disable sound generator (bit 0 or bit 2 of $1013 to zero). LCD Controller
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c. Set the volume according to the voice data ($1008 or $1009).
STK55C324
7. ABSOLUTE MAXIMUM RATINGS
Operating temperature ........................................................................ 0 to 70 J Storage temperature ...................................................................... -65 to 150 J Supply voltage ............................................................................................... 7 V Input voltage ........................................................................... -0.6 to Vdd+0.6 V
LCD Controller
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8. ELECTRICAL CHARACTERISTIC :
Parameter Supply Voltage Main system frequency Crystal frequency Operating current Sleep mode 1 current Sleep mode2 current (32768KHz using crystal) Symbol Vdd sys cry Idd Islp1 Islp2 Vdd=3V,sys=120Khz Vdd=3V,sys=1Mhz Vdd=3V, LCD off Vdd=5V, LCD off Vdd=3V,LCD on Vdd=3V,LCD off Vdd=5V, LCD on Vdd=5V, LCD off Vdd=3V,LCD on Vdd=3V,LCD off Vdd=5V,LCD on Vdd=5V,LCD off Vdd=5.0V Vdd=5.0V Vih=Vdd Vil=0V Ioh=-30A Iol=40A Ioh=-2mA Iol=2mA Vlcd -0.2 0 Vdd0.4 0 2.0 -0.6 0.8 -1 1 Vdd=2.7V Condition
STK55C324
Min Typ. Max Unit 2.5 0.1 3.0 1 32768 120 1 0.2 0.5 15 4 65 15 25 8 87 31 5.5 2 V MHz Hz A mA A A A A A A A A A A V V A A V V V V
Sleep mode2 current (32768KHz using RC)
Islp2
Input high voltage Input low voltage Input high leakage current Input low leakage current Output high voltage (For SEGx and COMx) Output low voltage (for SEGx and COMx) Output high voltage (for other pins) Output low voltage (for other pins)
Vih Vil Iih Iil Voh1 Vol1 Voh2 Vol2
Vlcd 0.2 Vdd 0.4
LCD Controller
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STK55C324
Sleep mode 1 current 2.0uA 1.5uA 1.0uA 0.5uA 0.0uA 2V
Islp1
3V
4V Vdd
5V
6V
Sleep mode 2 (LCD on, 32768KHz crystal) 150uA 100uA 50uA 0uA 2V
Islp2
3V
4V Vdd
5V
6V
Sleep mode 2 (LCD off, 32768KHz crystal) 30uA 20uA 10uA 0uA 2V Islp2
3V
4V Vdd
5V
6V
LCD Controller
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Max. operating frequency fsys (Mhz) 10 5 0 2V 3V 4V Vdd 5V
STK55C324
6V
LCD Controller
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9. LCD WAVEFORM :
1/64 sec
STK55C324
COM0
Vlcd 3/4 Vlcd 2/4 Vlcd 1/4 Vlcd Vss Vlcd 3/4 Vlcd 2/4 Vlcd 1/4 Vlcd Vss Vlcd 3/4 Vlcd 2/4 Vlcd 1/4 Vlcd Vss * * * Vlcd 3/4 Vlcd 2/4 Vlcd 1/4 Vlcd Vss Vlcd 3/4 Vlcd 2/4 Vlcd 1/4 Vlcd Vss
COM1
COM2
COM7
SEGx
There are two LCD matrix DOTs active at (SEGx,COM1) and (SEGx,COM7)
LCD Controller
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10. PAD LOCATION :
STK55C324
Chip size : 2090 x 2210 PAD-No 1 2 3 4 5 6 Name COM2 COM3 COM4 COM5 COM6 X 63.64 63.64 63.64 63.64 63.64 Y 2147.50 2027.50 1907.50 1787.50 1667.50 1547.50
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Unit : M PAD-No 34 35 36 37 38 39 Name SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 X Y
CONTRAST106.37
1983.64 62.50 2026.37 187.50 2026.37 307.50 2026.37 427.50 2026.37 547.50 2026.37 667.50 Issue date: 13 August, 1999
LCD Controller
Syntek Semiconductor Co., Ltd.
PAD-NoName X 7 COM7 63.64 8 SEG0 63.64 9 SEG1 63.64 10 SEG2 63.64 11 SEG3 63.64 12 SEG4 63.64 13 SEG5 63.64 14 SEG6 63.64 15 SEG7 63.64 16 SEG8 63.64 17 SEG9 63.64 18 SEG10 63.64 19 SEG11 183.64 20 SEG12 303.64 21 SEG13 423.64 22 SEG14 543.64 23 SEG15 663.64 24 SEG16 783.64 25 SEG17 903.64 26 SEG18 1023.64 27 SEG19 1143.64 28 SEG20 1263.64 29 SEG21 1383.64 30 SEG22 1503.64 31 SEG23 1623.64 32 SEG24 1743.64 33 SEG25 1863.64
STK55C324
Y PAD-NoName XY 1427.50 40 SEG32 2026.37787.50 1307.50 41 SEG33 2026.37907.50 1187.50 42 SEG34 2026.371027.50 1067.50 43 SEG35 2026.371147.50 947.50 44 SEG36 2026.371267.50 827.50 45 SEG37 2026.37 1387.50 707.50 46 SEG38 2026.37 1507.50 587.50 47 SEG39 2026.37 1627.50 467.50 48 XOSC2 2026.37 1747.50 347.50 49 XOSC1 2026.37 1867.50 227.50 50 RESL 2026.37 1987.50 107.50 51 OSC2 2026.37 2107.50 62.50 52 OSC1 1906.37 2147.50 62.50 53 VDD 1786.37 2147.50 62.50 54 PORT101666.37 2147.50 62.50 55 PORT111546.37 2147.50 62.50 56 PORT121426.37 2147.50 62.50 57 PORT131306.37 2147.50 62.50 58 PORT141186.37 2147.50 62.50 59 PORT151066.37 2147.50 62.50 60 PORT16946.37 2147.50 62.50 61 PORT17826.37 2147.50 62.50 62 VSS 706.37 2147.50 62.50 63 SOUND2 586.37 2147.50 62.50 64 SOUND1 466.37 2147.50 62.50 65 COM0 346.37 2147.50 62.50 66 COM1 226.37 2147.50
LCD Controller
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1. APPLICATION CIRCUIT :
STK55C324
Note : The value of R1 is from 0 to 500K ohm for external contrast control and can be omitted. S[0-39] C[0-7] S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 C7 C6 C5 C4 C3 C2
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2
U1 KC5732 R1 VCC 1 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 R C1 C0
VCC LS1
S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 Note : R3 can be deleted. VCC
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26
SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM7 COM6 COM5 COM4 COM3 COM2 CONTRAST COM1 COM0 SOUND1 SOUND2 VSS PORT17 PORT16 PORT15 PORT14 PORT13 PORT12 PORT11 PORT10 VDD OSC1 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 XOSC2 XOSC1 RESL OSC2
SPEAKER Q1 2N8050 R4 R VCC
Note : R4 is for volume control and can be omitted.
R3 150K XOSC1 R5 560K Y1 22p 32768Hz C3
C1 0.1u S1
S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
R2 24K
C2
XOSC2
For RC
22p
For crystal
Title Application circuit Size A Date: Document Number KC5732 Monday, May 24, 1999 Sheet 1 of 1 Rev A
LCD Controller
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User guide for STK55C322/324 emulator 1. Connectors :
STK55C324
1.1 J1 is a phone jack connector. Please connect to a voltage adapter with 7 Vdc output. 1.2 JP1 and JP2 should be connected to external LCD panel or LCD simulator. 1.3 JP3 is I/O port connector. 1.4 JP4 is for external speaker. 2. Switch setting : 2.1 S1 set the CPU compatible to standard CPU or KC5713 CPU. 2.2 S2 select internal CPU or external CPU. INT. CPU - In this mode, the internal CPU is enabled. The external CPU or ICE should be removed. EXT. CPU - In this mode, the internal CPU is disabled. An external CPU or ICE should be installed in U1. 2.3 S3 is power switch for EV chip. IC ON - The Vcc is connected to the KC5731 IC. IC OFF -- The Power pin of KC5731 IC is floating. The IC operating current can be measured by connecting a current meter between the two points of TP2 or between J7 and J8. 2.4 S4 is oscillator selection switch. XTAL -- Use 32768HZ crystal oscillator. RC -- Use RC oscillator. R3 will decide the oscillation frequency. In this mode, the Y1 crystal should be removed. The frequency can be checked at XOSC2. 2.5 S5 is reset switch. 2.6 S6 is speaker selection switch. INT. SPK -- On board speaker is selected. EXT. SPK -- External speaker is selected. The customer's speaker can be add between J9 and J11.
2.7 S7 is power switch. EXT. PWR -- Add DC power from J2 (GND) and J3 (Vdd). The voltage range is LCD Controller August, 1999
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STK55C324
from 2.2V to 5.5V. REG. PWR -- Add an adapter to J1. The system power is through the LM7805 voltage regulator.
LCD Controller August, 1999
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STK55C324
2.8 S8 is power switch for the emulator. ON -- Normal operation. OFF -- Add a current meter between TP3 or between J5 and J6 to measure the current of whole system. 3. Others : 3.1 TP1 - The CPU clock. The R2 will decide the CPU operating frequency. A small value will get a higher frequency. 3.2 The user program EPROM should be installed in U2. 3.3 The user program area is from 8000H-FFFFH. 3.4 The pull-up resistors should be added externally. The resistance of pull-up should be greater than 200K ohm. 3.5 SOUND1 is used to drive speaker. If SOUND1 pin is used as an output, then please cut the trace between U3-97 and the base of Q1. Then add a jumper wire from U3-97 to JP3-17. 4. Rework instructions for KP-2027 PCB. 4.1 Remove C3. 4.2 Isolate the left end of R3 from Vcc and add a jumper wire from the left end of R3 to XOSC2. 4.3 Add a jumper wire from J7 to U3-77. 4.4 Add a jumper wire from U3-96 to JP3-19. 4.5 Add a jumper wire from U3-97 to JP3-17.
LCD Controller August, 1999
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STK55C324
TP1 JP1 CPU CLK S1 STD CPU KC5713 CPU S0 S2 S4 S6 S8 S10 S12 S14 S16 S18 S20 S22 S24 S26 S28 S30 S32 S34 S36 S38 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 S1 S3 S5 S7 S9 S11 S13 S15 S17 S19 S21 S23 S25 S27 S29 S31 S33 S35 S37 S39
VCC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 VCC 10 9 8 7 6 5 4 3 25 24 21 23 2 26 27 1 U2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 O0 O1 O2 O3 O4 O5 O6 O7 8 11 12 13 15 16 17 18 19 D0 D1 D2 D3 D4 D5 D6 D7 38 R1 10K
U1 VDD SO D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 SYNC PH1 PH2 WR VPB MLB 33 32 31 30 29 28 27 26 9 10 11 12 13 14 15 16 17 18 19 20 22 23 24 25 7 3 39 34 1 5 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27 S26 S25 S24
U3 S2 INT. CPU 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 PH0 IRQ NMI CPUCLI SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 KC5731 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
EXT. CPU
40 36
RES BE
VCC S3 IC ON IC OFF TP2
20 22 CE OE 27512
37 4 6
PH0 IRQ NMI RDY VSS
P10 P11 P12 P13 P14 P15 P16 P17
JP3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34
2 21
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
C6502 D0 D1 C1 22p C2 22p R3 620K C3 10p VCC XTAL RC R2 Y1 32768Hz S4 24K
CPUSEL ROMCE SYNC CPURES CADR15 CADR14 CADR13 CADR12 CADR11 CADR10 CADR9 CADR8 CADR7 CADR6 CADR5 CADR4 CADR3 CADR2 CADR1 CADR0 RC XOSC2 XOSC1 RES OSC2 OSC1 VDD RWB CDATA0 CDATA1
SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM7 COM6 COM5 COM4 COM3 COM2
S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 C7 C6 C5 C4 C3 C2
HEADER 30X2 JP2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
C1 C3 C5 C7
C0 C2 C4 C6
CDATA2 CDATA3 CDATA4 CDATA5 CDATA6 CDATA7 P10 P11 P12 P13 P14 P15 P16 P17 VSS SOUND2 SOUND1 COM0 COM1 CONTRAST
VCC
HEADER 17X2
Note : 1. Remove C3 . 2. One end of R3 change from Vdd to XOSC2.
D2 D3 D4 D5 D6 D7 P10 P11 P12 P13 P14 P15 P16 P17 C0 C1
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
VCC
HEADER 25X2 VCC LS1 S6 S5 EXT SPK /RESET SPEAKER VCC J10 R5 R4 R D3 LED Title Emulator Size B Date: Document Number STK55C322/324 Monday, June 21, 1999 Sheet 1 of 1 Rev A 1 2 HEADER 2 TP3 330 VCC S8 ON OFF + C5 10u INT SPK
VDD D1 J1 DIODE PHONEJACK D4 DIODE DIODE 1 D5 DIODE + C6 10u GND U4 LM7805 VIN VOUT 2 EXT PWR REG PWR D2 S7
C4 0.1u
Note : R4 is used to adjust voice output volume and quality.
Q1 2N8050
LCD Controller August, 1999
3
22 /24
Issue date: 13
Syntek Semiconductor Co., Ltd.
STK55C324
Customer Information Sheet for STK55C322/324 1. Customer's Name : ____________________ 2. Project title : _________________________ 3. Syntek part number : ___________________ (will be filled by Syntek.) 4. Package --------------------------------5. Options : LCD display clock ----------- ( ) RC Por t 1 76543210 Pull-up 6. Customer code : Code form ----------------- ( ) EPROM Checksum ----------------A000-BFFF C000-DFFF E000-FFFF 8000-FFFF ( ) Chip ( ) QFP
990524
( ) 32768Hz crystal
( ) file _______________ 8000-9FFF __________H __________H __________H __________H __________H
7. Operating conditions : All the operating conditions listed below are for Syntek reference. Syntek will not guaranty on these values. Please refer to data book or contact Syntek for the guaranty values. Operating voltage : _____-_____ V Operating current : _____ mA Sleep current : Mode 1 : _____ A (LCD off) Mode 2 : _____ A (LCD on), _____ A (LCD off) Operating frequency : _____ Hz
LCD Controller August, 1999
23 /24
Issue date: 13
Syntek Semiconductor Co., Ltd.
STK55C324
Customer : __________________ Salesman : __________________Date : __/__/__ Check List before release the code to mask Item YES NO Check item Action 1 No problem is found in internal CPU Set S2 to INT. CPU and run mode. the program. 2 The operating current is acceptable Set S3 off. Measure the current on TP2. 3 The sleep current is acceptable. Same as item 2. 4 The CPU frequency is correct. Check TP1. 5 The 32768Hz frequency is correct Check XOSC2. 6 The pull-up resistance is greater than 200K ohm.
LCD Controller August, 1999
24 /24
Issue date: 13

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